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AT86RF232
? Bit 7 - PLL_CF_START
Manual start of center frequency calibration cycle.
Table 9-17. PLL_CF_START.
Register Bits
PLL_CF_START
Value
0
1
Description
Center frequency calibration cycle is finished
Initiates center frequency calibration cycle
PLL_CF_START = 1 initiates the center frequency calibration. The calibration cycle has
finished after t PLL_CF = 8μs (typ.). The register bit is cleared immediately after finishing
the calibration.
? Bit 3:0 - PLL_CF
VCO center frequency control word.
Table 9-18. PLL_CF.
Register Bits
PLL_CF
Value
0x7
Description
Initial CF start word
Valid values are [0xF, 0xE, …, 0x0]
Register 0x1B (PLL_DCU):
The PLL_DCU register controls the operation of the delay cell calibration loop.
Figure 9-17 . Register PLL_DCU.
Bit
0x1B
Read/Write
Reset value
Bit
0x1B
Read/Write
Reset value
7
PLL_DCU_START
R/W
0
3
R/W
0
6
R
0
2
R/W
0
reserved
5
reserved
R/W
1
1
R/W
0
4
R/W
0
0
R/W
0
PLL_DCU
PLL_DCU
? Bit 7 - PLL_DCU_START
Manual start of delay cell calibration cycle.
Table 9-19. PLL_DCU_START.
Register Bits
PLL_DCU_START
Value
0
1
Description
Delay cell calibration cycle is finished
Initiates delay cell calibration cycle
PLL_DCU_START = 1 initiates the delay cell calibration. The calibration cycle has
finished after t PLL_DCU = 6μs. The register bit is cleared immediately after finishing the
calibration.
121
8321A – MCU Wireless – 10/11
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